[docs]defget_bmcs(self)->int:"""SCPI: [SOURce<HW>]:BB:WLAY:PCONfig:HDA:BMCS \n Snippet: value: int = driver.source.bb.wlay.pconfig.hda.get_bmcs() \n Selects the modulation and coding scheme (MCS) for all spatial streams. The current firmware supports MSC for EDMG SC mode only, see Table 'MCS for IEEE 802.11ay EDMG SC mode', for example. \n :return: base_mcs: integer Range: 1 to 21 """response=self._core.io.query_str('SOURce<HwInstance>:BB:WLAY:PCONfig:HDA:BMCS?')returnConversions.str_to_int(response)
[docs]defset_bmcs(self,base_mcs:int)->None:"""SCPI: [SOURce<HW>]:BB:WLAY:PCONfig:HDA:BMCS \n Snippet: driver.source.bb.wlay.pconfig.hda.set_bmcs(base_mcs = 1) \n Selects the modulation and coding scheme (MCS) for all spatial streams. The current firmware supports MSC for EDMG SC mode only, see Table 'MCS for IEEE 802.11ay EDMG SC mode', for example. \n :param base_mcs: integer Range: 1 to 21 """param=Conversions.decimal_value_to_str(base_mcs)self._core.io.write(f'SOURce<HwInstance>:BB:WLAY:PCONfig:HDA:BMCS {param}')
# noinspection PyTypeChecker
[docs]defget_bw(self)->enums.WlanayBw:"""SCPI: [SOURce<HW>]:BB:WLAY:PCONfig:HDA:BW \n Snippet: value: enums.WlanayBw = driver.source.bb.wlay.pconfig.hda.get_bw() \n Sets the bandwidth of the EDMG single carrier signal that is a multiple of 2.16 GHz. \n :return: bw: BW216| BW432 BW216 2.16 GHz bandwidth BW432 Requires R&S SMW-K555. 4.32 GHz bandwidth """response=self._core.io.query_str('SOURce<HwInstance>:BB:WLAY:PCONfig:HDA:BW?')returnConversions.str_to_scalar_enum(response,enums.WlanayBw)
[docs]defset_bw(self,bw:enums.WlanayBw)->None:"""SCPI: [SOURce<HW>]:BB:WLAY:PCONfig:HDA:BW \n Snippet: driver.source.bb.wlay.pconfig.hda.set_bw(bw = enums.WlanayBw.BW216) \n Sets the bandwidth of the EDMG single carrier signal that is a multiple of 2.16 GHz. \n :param bw: BW216| BW432 BW216 2.16 GHz bandwidth BW432 Requires R&S SMW-K555. 4.32 GHz bandwidth """param=Conversions.enum_scalar_to_str(bw,enums.WlanayBw)self._core.io.write(f'SOURce<HwInstance>:BB:WLAY:PCONfig:HDA:BW {param}')
[docs]defget_cconfig(self)->int:"""SCPI: [SOURce<HW>]:BB:WLAY:PCONfig:HDA:CCONfig \n Snippet: value: int = driver.source.bb.wlay.pconfig.hda.get_cconfig() \n Sets the channel configuration that is the configuration 2.16 GHz and 4.32 GHz channels. \n :return: channel_config: integer Range: 1 to 176 """response=self._core.io.query_str('SOURce<HwInstance>:BB:WLAY:PCONfig:HDA:CCONfig?')returnConversions.str_to_int(response)
[docs]defset_cconfig(self,channel_config:int)->None:"""SCPI: [SOURce<HW>]:BB:WLAY:PCONfig:HDA:CCONfig \n Snippet: driver.source.bb.wlay.pconfig.hda.set_cconfig(channel_config = 1) \n Sets the channel configuration that is the configuration 2.16 GHz and 4.32 GHz channels. \n :param channel_config: integer Range: 1 to 176 """param=Conversions.decimal_value_to_str(channel_config)self._core.io.write(f'SOURce<HwInstance>:BB:WLAY:PCONfig:HDA:CCONfig {param}')
[docs]defget_pchannel(self)->float:"""SCPI: [SOURce<HW>]:BB:WLAY:PCONfig:HDA:PCHannel \n Snippet: value: float = driver.source.bb.wlay.pconfig.hda.get_pchannel() \n Queries the primary channel number as set via the channel configuration, see Table 'Channels of an EDMG STA'. \n :return: primary_cha: float Range: 1 to 8 """response=self._core.io.query_str('SOURce<HwInstance>:BB:WLAY:PCONfig:HDA:PCHannel?')returnConversions.str_to_float(response)
[docs]defget_rtpt(self)->int:"""SCPI: [SOURce<HW>]:BB:WLAY:PCONfig:HDA:RTPT \n Snippet: value: int = driver.source.bb.wlay.pconfig.hda.get_rtpt() \n Sets the number of receive (RX) TRN units per transmit (TX) TRN unit. \n :return: rx_trn_tx_trn: integer Range: 1 to 255 """response=self._core.io.query_str('SOURce<HwInstance>:BB:WLAY:PCONfig:HDA:RTPT?')returnConversions.str_to_int(response)
[docs]defset_rtpt(self,rx_trn_tx_trn:int)->None:"""SCPI: [SOURce<HW>]:BB:WLAY:PCONfig:HDA:RTPT \n Snippet: driver.source.bb.wlay.pconfig.hda.set_rtpt(rx_trn_tx_trn = 1) \n Sets the number of receive (RX) TRN units per transmit (TX) TRN unit. \n :param rx_trn_tx_trn: integer Range: 1 to 255 """param=Conversions.decimal_value_to_str(rx_trn_tx_trn)self._core.io.write(f'SOURce<HwInstance>:BB:WLAY:PCONfig:HDA:RTPT {param}')
[docs]defget_trn_m(self)->int:"""SCPI: [SOURce<HW>]:BB:WLAY:PCONfig:HDA:TRNM \n Snippet: value: int = driver.source.bb.wlay.pconfig.hda.get_trn_m() \n Sets the bits in the 4-bit EDMG TRN-Unit M field. \n :return: trn_m: integer Range: 0 to 15 """response=self._core.io.query_str('SOURce<HwInstance>:BB:WLAY:PCONfig:HDA:TRNM?')returnConversions.str_to_int(response)
[docs]defset_trn_m(self,trn_m:int)->None:"""SCPI: [SOURce<HW>]:BB:WLAY:PCONfig:HDA:TRNM \n Snippet: driver.source.bb.wlay.pconfig.hda.set_trn_m(trn_m = 1) \n Sets the bits in the 4-bit EDMG TRN-Unit M field. \n :param trn_m: integer Range: 0 to 15 """param=Conversions.decimal_value_to_str(trn_m)self._core.io.write(f'SOURce<HwInstance>:BB:WLAY:PCONfig:HDA:TRNM {param}')
[docs]defget_trn_n(self)->int:"""SCPI: [SOURce<HW>]:BB:WLAY:PCONfig:HDA:TRNN \n Snippet: value: int = driver.source.bb.wlay.pconfig.hda.get_trn_n() \n Sets the bits in the 2-bit EDMG TRN-Unit N field. \n :return: trn_n: integer Range: 0 to 3 """response=self._core.io.query_str('SOURce<HwInstance>:BB:WLAY:PCONfig:HDA:TRNN?')returnConversions.str_to_int(response)
[docs]defset_trn_n(self,trn_n:int)->None:"""SCPI: [SOURce<HW>]:BB:WLAY:PCONfig:HDA:TRNN \n Snippet: driver.source.bb.wlay.pconfig.hda.set_trn_n(trn_n = 1) \n Sets the bits in the 2-bit EDMG TRN-Unit N field. \n :param trn_n: integer Range: 0 to 3 """param=Conversions.decimal_value_to_str(trn_n)self._core.io.write(f'SOURce<HwInstance>:BB:WLAY:PCONfig:HDA:TRNN {param}')
[docs]defget_trn_p(self)->int:"""SCPI: [SOURce<HW>]:BB:WLAY:PCONfig:HDA:TRNP \n Snippet: value: int = driver.source.bb.wlay.pconfig.hda.get_trn_p() \n Sets the bits in the 2-bit EDMG TRN-Unit P field. \n :return: trn_p: integer Range: 0 to 3 """response=self._core.io.query_str('SOURce<HwInstance>:BB:WLAY:PCONfig:HDA:TRNP?')returnConversions.str_to_int(response)
[docs]defset_trn_p(self,trn_p:int)->None:"""SCPI: [SOURce<HW>]:BB:WLAY:PCONfig:HDA:TRNP \n Snippet: driver.source.bb.wlay.pconfig.hda.set_trn_p(trn_p = 1) \n Sets the bits in the 2-bit EDMG TRN-Unit P field. \n :param trn_p: integer Range: 0 to 3 """param=Conversions.decimal_value_to_str(trn_p)self._core.io.write(f'SOURce<HwInstance>:BB:WLAY:PCONfig:HDA:TRNP {param}')
# noinspection PyTypeChecker
[docs]defget_tsl(self)->enums.SequenceLength:"""SCPI: [SOURce<HW>]:BB:WLAY:PCONfig:HDA:TSL \n Snippet: value: enums.SequenceLength = driver.source.bb.wlay.pconfig.hda.get_tsl() \n Sets training sequence length as set with the 2-bit subfield 'Sequence Length' of the TRN field. \n :return: trn_seq_len: NORMAL| LONG| SHORT NORMAL Normal sequence length of 128 x NCB with subfield value 0. LONG Long sequence length of 256 x NCB with subfield value 1. SHORT Short sequence length of 64 x NCB with subfield value 2. """response=self._core.io.query_str('SOURce<HwInstance>:BB:WLAY:PCONfig:HDA:TSL?')returnConversions.str_to_scalar_enum(response,enums.SequenceLength)
[docs]defset_tsl(self,trn_seq_len:enums.SequenceLength)->None:"""SCPI: [SOURce<HW>]:BB:WLAY:PCONfig:HDA:TSL \n Snippet: driver.source.bb.wlay.pconfig.hda.set_tsl(trn_seq_len = enums.SequenceLength.LONG) \n Sets training sequence length as set with the 2-bit subfield 'Sequence Length' of the TRN field. \n :param trn_seq_len: NORMAL| LONG| SHORT NORMAL Normal sequence length of 128 x NCB with subfield value 0. LONG Long sequence length of 256 x NCB with subfield value 1. SHORT Short sequence length of 64 x NCB with subfield value 2. """param=Conversions.enum_scalar_to_str(trn_seq_len,enums.SequenceLength)self._core.io.write(f'SOURce<HwInstance>:BB:WLAY:PCONfig:HDA:TSL {param}')
defclone(self)->'HdaCls':"""Clones the group by creating new object from it and its whole existing subgroups Also copies all the existing default Repeated Capabilities setting, which you can change independently without affecting the original group"""new_group=HdaCls(self._core,self._cmd_group.parent)self._cmd_group.synchronize_repcaps(new_group)returnnew_group